I have a virtual device model plugged in through PDM, in which a PCIe switch is plugged into the ICH9 host bus, and a PCIe endpoint is connected to the secondary bus of the PCIe switch (each is a different PDM instance). The endpoint is capable of accessing system memory via DMA, which I model using PDMDevHlpPhysRead() and PDMDevHlpPhysWrite(). So far so good.
Now I need to add support for PCIe "atomic" operations. These are a set of endpoint initiated read/modify/write operations that are carried out without interruption. It's quite easy to implement the read/modify/write part in my model, but I am concerned about the possibility of another VirtualBox thread doing another memory access in between the read/modify/write phases.
Is there a way to ensure nothing else can access memory during the critical steps of the read/modify/write? I have mutual exclusion between my own two threads, but I'm worried about guest software or other device models that are not in my control.